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TechWorks

TechWorks

FPGA Network: Safety, Certification & Security

Start date/time :  09:00 19th May 2016
End date/time :  16:30 19th May 2016
Venue :  University of Hertfordshire, College Lane Campus, Hatfield, Hertfordshire, AL10 9AB
Organiser name :  Pete Davy
Organiser email :  pete.davy@nmi.org.uk

This event will explore technology issues implementing FPGA based systems where safety and security are prime considerations and when standards based certification must be met.

During 2015 the public was made more aware of cyber security threats and the real advent of self-driving cars made us more attuned to safety.

“Security” and “Safety” are sexy (well almost) and critical for many electronic products. Today the spotlight shines more brightly on safety, security and regulation through certification for FPGA based designs.

This event will explore technology issues implementing FPGA based systems where safety and security are prime considerations and when standards based certification must be met.

NMI’s network meetups assemble a melting pot of engineers from different sectors to share experience and latest experience. The aim is to educate and enthral and to return to the work place with ideas, solutions and knowledge. The content of the meeting will be geared for a technical audience with ample time for discussion and networking.

Would you like to speak? There a few open slots and NMI invites you to propose a topic. It’s a great way to connect with the industry and to show case the cool stuff your company does. Contact Pete Davy – 07979 706 357.

Intended Audience

Hardware & Software Engineers

Directors and Design Managers

Product Managers

Agenda

9:30 Registration & Coffee – Networking and Sponsor Tabletops

10.00 Welcome and introduction – Prof Sotudeh, University of Hertfordshire Testability for High Integrity FPGA Designs – Matt Noonan, Resource Group

Automated Traceability to Assist DO-254 Certification – Andy Nicol, Finnmeccanica

Break

Easing Functional Safety Certification with Pre-Certified FPGA Tool Flows (IEC 61508) – Roger May, Altera

D0-254 Coding Checks for RTL Code – Graeme Jessiman, Mentor Graphics

A Practical Guide to SEU Risks, Effects and Mitigation – Ken Chapman, Xilinx

Lunch

Special Host Presentation: FPGAs for Reconfigurable 5G and Beyond Wireless Communication – Dr. Milos Milosavljevic, University of Hertfordshire

Preventing Overbuilding and Cloning of Electronic Systems – Secure Production Programming – Peter Trott, Microsemi Corporation

Implications of Code Coverage Verification Techniques for Designs Adhering to DO-254 – David Clift, First EDA

15.45 Event Close

Sponsors & Exhibitors

Thank you to our Sponsor and Exhibitor: Mentor Graphics Resource Group To find out more information on Sponsorship Opportunities, please contact Pete Davy – 07979 706 357. Venue This event will take place in Room A166 and Room A161 in the Lindop Building.

See also:
Organisation:  TechWorks